Scalar-Native Qwen3 Reference Runtime As The Numerical Authority

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1. Executive Numerical Authority Decision

The architectural foundation of the TinyRustLM prelaunch browser-local AI product necessitates a paradigm where correctness supersedes ambient performance. In evaluating the parameters for interpreting the converted Qwen3-0.6B SLM2 composition, this report dictates that a strictly scalar, purely Rust-native execution path shall serve as the definitive, unimpeachable semantic oracle. This runtime must stand as the mathematical authority for byte interpretation, enforcing strict compliance without resorting to heuristic repairs, response fallback mechanisms, or code-debt tolerance. Optimized Central Processing Unit (CPU) Single Instruction, Multiple Data (SIMD) implementations and browser-based WebAssembly (WASM) kernels are intrinsically prone to associative floating-point reordering, differential handling of subnormal values, and compiler-specific fused multiply-add (FMA) injections1. Consequently, these optimized kernels must be treated strictly as downstream differential implementations. They are prohibited from operating as independent semantic authorities. The scalar path establishes the exact numerical baseline before optimized kernels are even authored. If a SIMD kernel diverges from the scalar oracle, the SIMD kernel is unconditionally incorrect. The runtime architecture is mathematically locked; it must fail closed upon any anomaly, establishing a perimeter where precise arithmetic execution is the sole metric of validity.

2. Exact Qwen3 Equations and Architecture Parameters

The Qwen3 architecture introduces structural refinements over conventional decoder-only transformer models. Most critically, it integrates Query-Key Normalization (QK-Norm) localized to the head dimension, Grouped-Query Attention (GQA), and Rotary Position Embeddings (RoPE) applied sequentially3. Establishing the numerical oracle requires explicitly defining this sequence analytically, derived directly from the immutable c1899de289a04d12100db370d81485cdf75e47ca source.

Architecture Parameters

The public Qwen3-0.6B configuration dictates specific dimensional constants that govern all matrix bounds and tensor allocations within the SLM2 format.

Decoder-Layer Mathematical Formulation

For an input token sequence spanning positions [Figure omitted from source export], the initial hidden state [Figure omitted from source export] is populated by extracting row vectors from the tied vocabulary embedding matrix [Figure omitted from source export] corresponding to the input token IDs. Each of the [Figure omitted from source export] transformer layers applies the following transformations sequentially. The formulation below covers both batch-one prefill ([Figure omitted from source export]) and token-by-token decode ([Figure omitted from source export]). 1\. Pre-Attention Normalization: Qwen3 utilizes Root Mean Square Normalization (RMSNorm) prior to the attention projection. [Figure omitted from source export] For a given vector [Figure omitted from source export] and learned scaling weights [Figure omitted from source export], the operation avoids mean-centering: [Figure omitted from source export] 2\. Query, Key, and Value Projections: The normalized stream is projected into the attention matrices without bias vectors17. [Figure omitted from source export] [Figure omitted from source export] [Figure omitted from source export] 3\. Query-Key Normalization (QK-Norm): To stabilize optimization at scale, Qwen3 isolates and normalizes the queries and keys independently. This RMSNorm is applied iteratively across each head dimension [Figure omitted from source export], distinct from the residual stream normalization3. [Figure omitted from source export] [Figure omitted from source export] 4\. Rotary Position Embedding (RoPE): RoPE acts on the normalized queries and keys to inject relative positional information5. For a context position [Figure omitted from source export] and a feature pair indexed by [Figure omitted from source export] and [Figure omitted from source export] (where [Figure omitted from source export]): [Figure omitted from source export] [Figure omitted from source export] [Figure omitted from source export] An identical rotational matrix is applied to the keys to produce [Figure omitted from source export]. 5\. Scaled Dot-Product Grouped-Query Attention: The model maps the [Figure omitted from source export] query heads to the [Figure omitted from source export] key/value heads via a grouping factor [Figure omitted from source export]5. For a specific query head [Figure omitted from source export], the corresponding KV head index is [Figure omitted from source export]. [Figure omitted from source export] A causal mask is applied during prefill to prevent future-token visibility, forcing [Figure omitted from source export] for [Figure omitted from source export]. During the decode phase, [Figure omitted from source export] is a vector, and the mask is unnecessary. [Figure omitted from source export] The attention outputs from all heads are concatenated and projected through the output weight matrix: [Figure omitted from source export] [Figure omitted from source export] 6\. SwiGLU Feed-Forward Network: The residual stream is normalized again prior to the multi-layer perceptron. [Figure omitted from source export] The MLP employs the SwiGLU architecture, substituting traditional Rectified Linear Units (ReLU) with the Sigmoid Linear Unit (SiLU) gating mechanism21. [Figure omitted from source export] [Figure omitted from source export] The SiLU activation is defined mathematically as [Figure omitted from source export]21. [Figure omitted from source export] [Figure omitted from source export] 7\. Final Normalization and Tied Logits: After traversing 28 layers, the terminal hidden state undergoes a final normalization and is projected back into the vocabulary space using the transposed embedding matrix, yielding the logits11. [Figure omitted from source export] [Figure omitted from source export]

3. SLM2 Tensor and Quantization Interpretation

The SLM2 file is an immutable artifact derived directly from the Safetensors format, designed for zero-copy memory-mapped (mmap) parsing24. The scalar runtime must parse this format using rigorous, allocation-free validation checks.

File Layout and Safe Metadata Parsing

An SLM2 file initiates with an 8-byte little-endian unsigned 64-bit integer, [Figure omitted from source export], representing the exact byte length of the subsequent UTF-8 JSON header24. The JSON dictionary maps tensor strings (e.g., model.layers.0.mlp.gate\_proj.weight) to dictionaries containing dtype, shape, and data\_offsets represented as \[BEGIN, END\] integer pairs. The data block immediately follows the JSON header. The scalar oracle must enforce the following absolute invariants during header parsing to preclude memory violations:

1. File Boundary Constraint: Every END offset must be strictly less than or equal to the total file size minus the header prefix ([Figure omitted from source export]).

2. Monotonic Non-Overlapping Spans: Offsets must be strictly sequential. For tensor [Figure omitted from source export], [Figure omitted from source export].

3. Strict Alignment: Every [Figure omitted from source export] offset must map to an address divisible by 8\. This guarantees that direct casting to f32 slices does not trigger unaligned hardware faults on ARM architectures24.

Mixed-Q8 Quantization Definition

The SLM2 composition utilizes a mixed-Q8 quantization strategy. Critical parameter vectors requiring high dynamic range—specifically 1D RMSNorm scales ([Figure omitted from source export]) and RoPE constants—remain in pure f32. Massive 2D projection matrices (e.g., [Figure omitted from source export]) are compressed using the Q8\_0 block-quantization scheme27. The Q8\_0 Block Contract: A matrix is flattened and segmented into contiguous blocks of 32 elements. A single [Figure omitted from source export] block represents 32 parameters using 34 physical bytes:

• Scale Factor ([Figure omitted from source export]): 2 bytes representing a 16-bit floating-point (f16) scale29.
• Quantized Elements ([Figure omitted from source export]): 32 bytes representing an array of 32 signed 8-bit integers (i8).

The matrix-vector dot product [Figure omitted from source export] dictates the exact dequantization and multiplication order. For an input vector slice [Figure omitted from source export] and a quantized weight block [Figure omitted from source export]:

1. Scale Extraction: The f16 scale [Figure omitted from source export] is read and unconditionally promoted to an f32 value.

2. Integer Promotion: Each signed integer [Figure omitted from source export] is promoted to f32.

3. Reconstruction and Multiplication: The scalar operation proceeds strictly sequentially from index 0 to 31\.

[Figure omitted from source export]

Constraint on Tail Groups: The block size of 32 is a mathematical absolute. SLM2 dimensions must be perfectly divisible by 32\. Any tensor shape failing a modulo 32 inspection upon instantiation must trigger a typed initialization fault. Tail group handling is explicitly prohibited to simplify the scalar loops and maintain easily auditable control flow.

4. Floating-Point and Determinism Policy

The authority of the scalar runtime demands explicit operational definitions for floating-point mathematics. Variations across win-x64, linux-x64, and linux-arm64 frequently originate in undefined compiler optimizations, divergent mathematical standard libraries, or varied hardware implementations of the IEEE 754 specification1.

The f32 Authority

The scalar runtime shall execute all activations, accumulations, and non-linearities in strictly typed f32 arithmetic. While widened integer arithmetic (e.g., scaled fixed-point) guarantees determinism, it introduces insurmountable complexities in approximating the exponential calculations required for the SiLU activation and Softmax21. Conversely, utilizing f64 (double precision) as the execution oracle masks the rounding anomalies that physical SIMD/WASM hardware kernels—which are fundamentally constrained to f32 lanes for throughput—will inevitably produce1. A high-precision f64 diagnostic overlay may be maintained for isolated theoretical gradient tracing, but f32 stands as the faithful product reference.

Hardware and Compiler Reproducibility

To enforce mathematical immutability, the Rust scalar runtime must enforce the following compilation and execution constraints:

1. FMA Suppression: Fused Multiply-Add instructions ([Figure omitted from source export]) preserve infinite internal precision during the multiplication phase, delaying IEEE rounding until the addition1. This diverges from discrete operations (let tmp \= a \* b; let res \= tmp \+ c;), which apply rounding twice. The scalar oracle must explicitly disable FMA generation utilizing compiler flags (e.g., rustc \-C target-feature=-fma) or localized \#\[instruction\_set\] pragmas.

2. Subnormal Mandates: Flush-to-Zero (FTZ) and Denormals-Are-Zero (DAZ) behaviors alter the trajectory of cascading small values2. The scalar oracle must mandate strict IEEE 754 gradual underflow. If performance cratering occurs due to subnormal cascades causing microcode traps, this exposes an arithmetic degradation in the model generation itself, which must not be obscured by hardware shortcuts.

3. NaN/Inf Rejection: Calculations yielding f32::NAN or f32::INFINITY must immediately abort the token generation loop and escalate a typed error1. The reference runtime must never deploy response repair techniques, such as casting NaNs to zero to artificially salvage a failing sequence.

5. Scalar Runtime Algorithms and Pseudocode

The oracle relies on explicitly bounded, legibly structured Rust algorithms. By rigorously defining the decode loops, we guarantee that matrix coordinates cannot leak out of bounds, preventing panic-unwinding and data exposure.

Quantized Tensor Access and Dot Product

Rust struct QuantizedTensorView\<'a\> { data: &'a \[u8\], rows: usize, cols: usize, }

impl\<'a\> QuantizedTensorView\<'a\> { /// Computes the dot product of a specific matrix row against an activation vector. fn q8\_dot(&self, row: usize, act: &\[f32\]) \-\> Result\<f32, Slm2Error\> { if self.cols % 32 \!= 0 { return Err(Slm2Error::UnsupportedQuantization); } if act.len() \!= self.cols { return Err(Slm2Error::DimensionMismatch); } if row \>= self.rows { return Err(Slm2Error::InternalInvariantBreach); }

let blocks \= self.cols / 32; let row\_byte\_offset \= row \ blocks \ 34; let mut acc \= 0.0f32;

for b in 0..blocks { let base \= row\_byte\_offset \+ (b \* 34); // Read little-endian f16 scale and convert to f32 let scale\_f16 \= u16::from\_le\_bytes(\[self.data\[base\], self.data\[base+1\]\]); let scale \= f16\_to\_f32(scale\_f16);

for i in 0..32 { // Read signed 8-bit integer and promote let q\_val \= self.data\[base \+ 2 \+ i\] as i8 as f32; acc \+= act\[b \ 32 \+ i\] \ (q\_val \* scale); } } Ok(acc) } }

Transformer Layer Execution Loop

Rust fn decode\_layer( layer\_idx: usize, x: &mut \[f32\], weights: \&Slm2Weights, kv\_cache: &mut KvCache, pos: usize, cos\_val: &\[f32\], sin\_val: &\[f32\] ) \-\> Result\<(), Slm2Error\> { let d \= weights.hidden\_dim; let mut residual \= vec\!\[0.0f32; d\]; residual.copy\_from\_slice(x);

// 1\. Pre-Attention RMSNorm rmsnorm(x, \&weights.norm1\[layer\_idx\], 1e-6)?;

// 2\. QKV Projections (allocating buffers for output) let mut q \= vec\!\[0.0f32; 16 \ 128\]; let mut k \= vec\!\[0.0f32; 8 \ 128\]; let mut v \= vec\!\[0.0f32; 8 \* 128\];

for i in 0..q.len() { q\[i\] \= weights.wq\[layer\_idx\].q8\_dot(i, x)?; } for i in 0..k.len() { k\[i\] \= weights.wk\[layer\_idx\].q8\_dot(i, x)?; } for i in 0..v.len() { v\[i\] \= weights.wv\[layer\_idx\].q8\_dot(i, x)?; }

// 3\. QK-Norm qk\_norm(&mut q, \&weights.q\_norm\[layer\_idx\], 16, 128, 1e-6)?; qk\_norm(&mut k, \&weights.k\_norm\[layer\_idx\], 8, 128, 1e-6)?;

// 4\. RoPE apply\_rope(&mut q, cos\_val, sin\_val, 16, 128)?; apply\_rope(&mut k, cos\_val, sin\_val, 8, 128)?;

// 5\. KV Cache Append kv\_cache.append(layer\_idx, pos, \&k, \&v)?;

// 6\. Grouped-Query Attention let mut attn\_out \= vec\!\[0.0f32; 16 \* 128\]; gqa\_attention(&mut attn\_out, \&q, kv\_cache, layer\_idx, pos, 16, 8, 128)?;

// 7\. Attention Output Projection & Residual for i in 0..d { x\[i\] \= residual\[i\] \+ weights.wo\[layer\_idx\].q8\_dot(i, \&attn\_out)?; } residual.copy\_from\_slice(x);

// 8\. MLP (SwiGLU) rmsnorm(x, \&weights.norm2\[layer\_idx\], 1e-6)?;

let d\_mlp \= 3072; let mut gate \= vec\!\[0.0f32; d\_mlp\]; let mut up \= vec\!\[0.0f32; d\_mlp\]; for i in 0..d\_mlp { gate\[i\] \= weights.wgate\[layer\_idx\].q8\_dot(i, x)?; up\[i\] \= weights.wup\[layer\_idx\].q8\_dot(i, x)?; }

let mut mlp\_out \= vec\!\[0.0f32; d\_mlp\]; for i in 0..d\_mlp { // SiLU calculation: x \ sigmoid(x) let sig \= 1.0 / (1.0 \+ (-gate\[i\]).exp()); mlp\_out\[i\] \= (gate\[i\] \ sig) \* up\[i\]; }

for i in 0..d { x\[i\] \= residual\[i\] \+ weights.wdown\[layer\_idx\].q8\_dot(i, \&mlp\_out)?; } Ok(()) }

6. KV-Cache and Generation-State Design

The Grouped-Query Attention mechanism demands precise spatial locality within the Key-Value cache to eliminate per-token dynamic heap allocations.

Extents and Bytes Formulas

For a target context window of [Figure omitted from source export] tokens, the cache capacity is derived strictly as a function of the Qwen3 parameters: [Figure omitted from source export], [Figure omitted from source export], [Figure omitted from source export], and [Figure omitted from source export] bytes (for f32)11.

A standard conversation boundary of 8,192 tokens dictates exactly 1,879,048,192 bytes (1.87 GB) of static, transient heap memory.

Layout and Ownership

The KV cache is instantiated as a flat, statically sized 1D array (Vec\<f32\>) owned by the session context. To maximize memory continuity during historical sequence reads, the indexing layout is established as \[Layer\]\[Head\]\[Sequence Position\]\[Dimension\].

• Continuation and Append: At token decode step [Figure omitted from source export], computed values [Figure omitted from source export] and [Figure omitted from source export] are copied into the exact bounds indexed by [Figure omitted from source export].
• Maximum Context Overflow: If a request pushes the generation token count to [Figure omitted from source export], the runtime must immediately yield Slm2Error::ContextOverflow. Cyclic overwriting (ring buffering) is unconditionally banned, as it corrupts exact positional embeddings associated with the RoPE matrix.
• Cancellation and Reset: Upon user cancellation or composition identity change, the session structure zeros out the current\_seq\_len atomic variable. A heavy memset of the 1.87 GB buffer is unnecessary and wasteful; old data remains structurally unreachable because attention masking is strictly bounded by current\_seq\_len. Total cache invalidation drops the Vec only when the specific conversation stream is terminated.

7. Deterministic Sampling Contract

Generating text involves resolving the unnormalized vocabulary logits [Figure omitted from source export] into a single deterministic token selection. Floating-point accumulation during softmax normalization represents a significant vulnerability to reproducibility.

Logit Softmax Stability

To prevent exponential scaling bounds overflow (e.g., yielding f32::INFINITY), the maximum scalar logit is extracted to shift the distribution1.

1. Isolate maximum: [Figure omitted from source export].

2. Compute stable exponentiations: [Figure omitted from source export].

3. Accumulate sum: [Figure omitted from source export].

4. Normalize: [Figure omitted from source export].

Top-K, Top-P, and Repetition Penalty Logic

A stable sequence of filtering must be enforced:

1. Repetition Penalty: Prior to softmax, if token [Figure omitted from source export] exists in the context history, the logit [Figure omitted from source export] is penalized. If [Figure omitted from source export], [Figure omitted from source export]. If [Figure omitted from source export], [Figure omitted from source export].

2. Tie-Breaking Sort: If logit values are perfectly bitwise identical, standard sorting algorithms induce non-determinism based on memory order. The runtime must enforce a stable descending sort of [Figure omitted from source export], utilizing the original vocabulary integer index [Figure omitted from source export] as an ascending secondary tie-breaker2.

3. Top-K: Slice the sorted array to exactly [Figure omitted from source export] elements, then recalculate the sum and re-normalize [Figure omitted from source export].

4. Top-P (Nucleus): Iterate sequentially across the truncated array, maintaining an f32 cumulative sum. Retain tokens until the accumulator stringently exceeds [Figure omitted from source export]. Re-normalize the surviving tokens.

5. Random Number Generation: The contract requires the deterministic rand::rngs::StdRng (ChaCha8 algorithm) seeded explicitly by a 64-bit unsigned integer passed in the initial prompt request.

6. Selection: Generate a uniform random float [Figure omitted from source export]. Iterate across the final probabilities; select the first token where the cumulative threshold exceeds [Figure omitted from source export].

The stop-token generation (token ID 151645 for Qwen3-Instruct9) triggers immediate success termination, yielding the payload gracefully.

8. Error, Cancellation, and Resource Boundaries

Errors traversing the FFI or WASM boundaries must remain entirely descriptive. Obfuscating memory exhaustion or arithmetic collapse behind truncated, pseudo-successful responses breeds downstream behavioral instability. The Slm2Error Rust enum establishes typed, inescapable boundaries32:

In the event of an exception, the array of successfully generated tokens prior to the failure is flushed back to the host, packaged alongside the specific error enum.

9. Hand-Checkable Kernel Vectors

To guarantee the native-scalar oracle is devoid of algebraic defects prior to initializing the 598 MB payload, highly isolated test vectors must be manually constructed and checked.

• RoPE Extreme Boundaries: Input a vector of length 128 featuring alternating ones and zeros: [Figure omitted from source export]. Set token position [Figure omitted from source export]. Because [Figure omitted from source export], the upper dimensional indices will shift minimally, while the lowest indices will demonstrate violent phase shifts. Values must be verified against NumPy float3215.
• GQA Head Mapping Routing: Construct a test with [Figure omitted from source export]. Ensure [Figure omitted from source export]. Inject unique, adversarial large positive identifiers into Key head 0, and large negative identifiers into Key head 1\. Validate that attention values from Query heads 2 and 3 route perfectly to Key head 1, completely isolated from Key head 0 data.
• Adversarial SwiGLU: Inject an input gate vector: [Figure omitted from source export]. The SiLU equation ([Figure omitted from source export]) computes to approximately [Figure omitted from source export]. Verify that the [Figure omitted from source export] propagates an infinitesimally small negative float (as Swish implies slight negative leakage, unlike ReLU's absolute zero cutoff)21.
• Repetition Penalty Inversion: Input logits [Figure omitted from source export]. Apply a penalty of [Figure omitted from source export] to indices [Figure omitted from source export] and [Figure omitted from source export]. The correct outcome must reduce the positive value (yielding [Figure omitted from source export]) and magnify the negative value (yielding [Figure omitted from source export]).
• Quantized Tails: Construct a 32-element Q8\_0 array where the f16 scale reads [Figure omitted from source export], and the signed integer payload alternates extreme bounds: [Figure omitted from source export]. The output dot-product must track precise f32 alignment without anomalous subnormal hardware underflow.

10. Source-Derived End-to-End Conformance

Deploying the scalar runtime into production confirms that its output is semantically indistinguishable from the Python PyTorch reference implementation instantiated from the c1899de289a04d12100db370d81485cdf75e47ca commit.

1. Absolute Greedy Agreement: When executing with Temperature=0 (Greedy Decoding), the output token string sequence generated by the Rust scalar path must yield a 100% exact match across a battery of 1,000 hidden prompt vectors.

2. Final Logit Cosine Similarity: Extract the unnormalized logits matrix [Figure omitted from source export]. The cosine similarity between the Rust logits and the PyTorch float32 logits must register [Figure omitted from source export]34.

3. Unit in the Last Place (ULP) Escalation: Divergence in the least significant mantissa bit is unavoidable due to differences in summation associativity (Rust's sequential block accumulation vs PyTorch's blocked matrix multiplication).

• If the maximum ULP divergence across the logit vector is [Figure omitted from source export], the variance is mathematically benign.
• If the ULP divergence exceeds 256 for any scalar output, the specific tensor computation is escalated for manual architectural review to hunt for un-suppressed FMA injections or precision loss during f16-to-f32 scale casting.

11. Memory/Time Model and Measurement Plan

Architectural constraints require that resource expectations conform to explicit algebraic dimensions, rather than observed approximations.

• Model Mapping Strategy: The 598 MB SLM2 file is mapped into Virtual Memory Allocation (VMA). The Resident Set Size (RSS) will rapidly approach 598 MB as sequential matrix multiplications touch every page per layer25.
• Transient Activations: The residual stream dimension is [Figure omitted from source export]. The expansion SwiGLU vector requires [Figure omitted from source export]. Both require f32 allocations (4 bytes). Total transient vector capacity per token is roughly 16 KB. During prefill (e.g., [Figure omitted from source export]), intermediate sequence allocations temporarily peak at \~16 MB.
• Tokenizer and Logits Buffer: Resolving the logits requires housing [Figure omitted from source export] elements [Figure omitted from source export] 4 bytes \= 607 KB.

Measurements on target physical environments must specifically isolate TLB (Translation Lookaside Buffer) miss rates. On win-x64 and linux-x64 architectures, traversing the 1.87 GB static KV cache linearly during attention mechanisms can induce significant page fault thrashing. On linux-arm64 configurations, telemetry must validate NEON instruction pipeline throughput, guaranteeing that subnormal floats do not accidentally trap into the OS kernel exception handler (which degrades step times from milliseconds to whole seconds).

12. SIMD Handoff and Acceptance Gate

The scalar codebase is deliberately minimized, aggressively audited, and mathematically bound to the equations defined in Section 2\. It serves as the immutable root of trust. When production pressures introduce advanced SIMD (AVX2/AVX-512) or WASM (SIMD128) capabilities to accelerate matrix dot-products, these optimizations exist solely behind a strict differential gate:

1. Dispatch Admission: The SIMD code is routed dynamically depending on host CPU feature detection (e.g., is\_x86\_feature\_detected\!("avx2")).

2. Differential Testing: During the continuous integration pipeline, thousands of exact pre-recorded activation vectors—generated identically by the scalar oracle—are pumped into the SIMD kernels.

3. Fail-Closed Behavior: If the SIMD output deviates from the scalar baseline beyond the established 128 ULP boundary (e.g., due to the SIMD kernel processing 16 elements in parallel and aggregating in a non-sequential tree), the kernel is rejected.

Furthermore, if an active SIMD implementation encounters an operational fault or an unaligned memory address, it must immediately halt. Production logic is unconditionally prohibited from quietly falling back to the scalar pathway mid-execution to hide optimized-kernel defects.

13. Unknowns Requiring Local Artifacts and Execution

Complete operational authorization remains pending the physical inspection of compiled targets executing on physical hardware boundaries.

1. Dequantization Subnormal Triggers: If adversarial weights in the Q8 format exist directly upon the [Figure omitted from source export] boundary threshold, does the target CPU's Floating-Point Unit (FPU) stall severely to maintain IEEE 754 compliance without FTZ? Micro-benchmarking runtime latency graphs on target consumer silicon must be produced to answer this2.

2. Mmap Zero-Copy Emulation: On restrictive environments like highly sandboxed browser environments executing WebAssembly, standard Operating System mmap (zero-copy VMA) may be forcibly emulated by the JavaScript engine (V8/SpiderMonkey). This would force the host to eagerly allocate physical RAM to copy the 598 MB file, eliminating the zero-copy advantage25. Specific memory telemetry of browser execution artifacts is required.

14. Annotated Primary-Source Bibliography

The following citations map directly to the immutable architectural characteristics of the Qwen3 suite, the Safetensors storage format, and the strict numerical handling required for transformer reproduction.

1. 6 Qwen3 Immutable Configuration Constants (c1899de289a04d12100db370d81485cdf75e47ca): The official Hugging Face config.json for Qwen3-0.6B establishes critical tensor bounds, proving [Figure omitted from source export], [Figure omitted from source export], [Figure omitted from source export], [Figure omitted from source export], and confirming that tie\_word\_embeddings: true is enabled, reducing file size by overlapping the vocabulary matrices.

2. 3 Qwen3 Technical Report & QK-Norm Isolation: Verified analysis of the Qwen3 specific architecture highlights the unique integration of Query-Key Normalization. This proves that RMSNorm occurs explicitly on the [Figure omitted from source export] head vectors immediately prior to RoPE, mitigating variance instability during massive parallel scaling4.

3. 21 SwiGLU & SiLU Activation Characteristics: Analysis of modern SwiGLU layers specifies the mathematical definition of SiLU ([Figure omitted from source export]). This documents the requirement for continuous, smooth gradients allowing minor negative leakage compared to rigid ReLU implementations21.

4. 24 Safetensors Specification & Alignment: The official Safetensors documentation dictates the zero-copy memory mapping contract. It verifies the little-endian 8-byte JSON header size prefix and mandates exact 8-byte alignment constraints for the binary payload to preclude undefined behavior in Rust24.

5. 27 Q8\_0 Block Quantization Standards: Specifications detailing the 32-element Q8\_0 structure. Confirms the 2-byte f16 scale and 32-byte integer payload mapping, guaranteeing exact deterministic reconstruction order independent of platform capability29.

6. 1 Higham's Accuracy and Stability / IEEE 754 Hardware Determinism: Extensive computational analysis covering associative dot-product error bounding and hardware deviations. Warns against the precision-altering effects of Fused Multiply-Add (FMA) instructions, and emphasizes the necessity of explicitly handling subnormal floating-point numbers without relying on unpredictable flush-to-zero (FTZ) compiler behaviors1.

7. 9 Qwen3 Tokenizer Definitions: Identifies 151645 as the strict generation stop-token, dictating proper sequence termination.

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3. QK-Norm | Sebastian Raschka, PhD, https://sebastianraschka.com/llm-architecture-gallery/qk-norm/

4. arXiv:2505.09388v1 \[cs.CL\] 14 May 2025, https://arxiv.org/pdf/2505.09388

5. qwen3\_from\_scratch.ipynb \- GitHub Gist, https://gist.github.com/vukrosic/94dc965a22b0892042f44fed25918598

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14. qoranet/QORA-LLM-3B \- Hugging Face, https://huggingface.co/qoranet/QORA-LLM-3B

15. Task — TogetherBench, https://togetherbench.com/tasks.html

16. TurboQuant KV Cache Compression — Full HIP/ROCm Port (gfx1100), https://github.com/ggml-org/llama.cpp/discussions/21526

17. LLMs-from-scratch/ch05/11\_qwen3/standalone-qwen3.ipynb at main, https://github.com/rasbt/LLMs-from-scratch/blob/main/ch05/11\_qwen3/standalone-qwen3.ipynb

18. modeling\_qwen3.py \- huggingface/transformers \- GitHub, https://github.com/huggingface/transformers/blob/main/src/transformers/models/qwen3/modeling\_qwen3.py

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21. Helion SwiGLU MLP Example, https://helionlang.com/examples/swiglu.html

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23. What is an Activation Function? Complete Guide 2026 \- Articsledge, https://www.articsledge.com/post/activation-function

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